Chinese method of making ultrathin semiconductors could lead to faster microchips

A team led by Liu Kaihui of Peking University, Liu Can of Renmin University, and Zhang Guangyu of the Institute of Physics at the Chinese Academy of Sciences developed a fabrication method to produce a semiconductor material just 0.7 nanometres thick.

The researchers’ findings, which were published in the peer-reviewed journal Science on July 5, address a key barrier to reducing the size of traditional silicon-based chips – as devices shrink, silicon chips run into physical limits that affect their performance.

The scientists explored two-dimensional (2D) transition-metal dichalcogenides (TMDs) as an alternative to silicon, with a thickness of just 0.7 nanometres compared to silicon’s typical 5-10 nanometres.

TMDs also consume less power and have superior electron transport properties, making them ideal for the ultra-scaled down transistors that will be a feature of next-generation electronic and photonic chips.

However, producing TMDs has been challenging – until now. According to the paper, the technique developed by the scientists allows them to quickly produce high-quality 2D crystals in seven different formulations, making mass production feasible.

The traditional fabrication process, which involves layer-by-layer assembly of atoms on a substrate – like building a wall with bricks – often results in crystals with insufficient purity, Liu Kaihui told state news agency Xinhua.

“This is due to uncontrollable atomic arrangements in crystal growth and the accumulation of impurities and defects,” he said.

The team arranged the first layer of atoms on the substrate as if they were following the traditional process. However, subsequent atoms were added between the substrate and the first crystal layer, pushing upwards like bamboo shoots to form new layers.

The pioneering “grow at interface” method ensures that each crystal layer’s structure is determined by the underlying substrate, which also effectively prevents the accumulation of defects and enhances structural controllability.

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A statement on Peking University’s website said the technique demonstrated in the study achieved a crystal layer formation rate of 50 layers per minute, with a maximum of 15,000 layers.

“Each layer’s atomic arrangement is perfectly parallel and precisely controlled,” the university said.

The team’s high-quality 2D crystals included molybdenum disulfide, molybdenum diselenide, tungsten disulfide, tungsten diselenide, niobium disulfide, niobium diselenide, and molybdenum sulfoselenide.

These materials meet international standards for integrated circuit materials, including the International Roadmap for Devices and Systems’ electron mobility target and frequency conversion capabilities, the researchers said.

“These 2D crystals, when used as materials for transistors in integrated circuits, can significantly enhance chip integration. On a chip the size of a fingernail, the density of transistors can be substantially increased, thus boosting computing power,” Liu said.